If this is your first visit, be sure to
check out the FAQ by clicking the
link above. You may have to register
before you can post: click the register link above to proceed. To start viewing messages,
select the forum that you want to visit from the selection below.
New! You can now log in to the forums with your chaos.com account as well as your forum account.
What Teodor said; we got the OpenCL driver for Xeon Phi, but our tests so far have been with direct compilation of the code for the card and not through OpenCL.
"I just got here question": I thought the PHI cores were pretty straightforward "co-processors," so why do you have to write custom code for them? I was hoping they just added 60 cores and acted as if you had a render farm internally ... and bingo ... that was all you needed. Can you clarify just a little?
schultzeworks:
The Phi has 228 x86 cores, but they are not the same as the cores in a normal CPU.
They are slower, lower frequency, in-order and simpler design cores.
They have their own instructions for SIMD and doesn't support SSE, MMX, AVX, only their instruction set for vector data.
So to get a good performance on the Phi you need massive parallelism in the algorithms. Every serial part of the program is 10-20 times slower than a normal CPU.
We need to do some tweaks and improvement to V-Ray to make it work efficiently on the Phi.
So will these tweaks result in a separate version for vray just for PI architecture or will these tweaks work on a universal build of vray that will maintain the current default cpu performance as well?
So will these tweaks result in a separate version for vray just for PI architecture or will these tweaks work on a universal build of vray that will maintain the current default cpu performance as well?
No idea at all yet. Of course, we'll try to avoid separate code paths as much as possible; we have enough trouble with the duplicated code on the GPU as it is...
The kernels are optimized for photo-realistic rendering on the latest IntelĀ® processors with support for SSE, AVX, and 16 wide Xeon Phi vector instructions. In version 2.0 Embree now also supports applications written with the Intel SPMD Programm Compiler (ISPC, http://ispc.github.com) which makes it possible to write a renderer in ISPC that leverages SSE, AVX, and Xeon Phi instructions without any code change.
I can't help but feel these would be a great alternative to GPU rendering.
That is, unfortunately, an opinion that I can't share right now... Plus I'm not really thrilled at the prospect of rewriting things yet again for another hardware architecture without clear performance benefits.
I can't help but feel these would be a great alternative to GPU rendering.
I have mixed opinion about it but thing to remember. In order to support xeon PHI card you need xeon CPU and so on as far as I remember. So it may be a very expensive hardware exchange for some people and gpu might just be better money/power ration option.
Originally posted by Dariusz Makowski (Dadal)View Post
In order to support xeon PHI card you need xeon CPU and so on as far as I remember.
I don't think this is correct. Our machine with the PHI has Xeons in it, but I doubt it will be a problem to put the card in a regular desktop machine.
Comment